Is the KiCad checker free?
Yes. Each network gets 10 free checks a day with no account. The limit keeps the shared checker fast for everyone and resets at midnight UTC.
FREE TOOL
Free online KiCad design checker
Upload a KiCad project and get KiCad's own design rule check (DRC), electrical rule check (ERC) and schematic-to-PCB parity in your browser, plus an optional check against JLCPCB or PCBWay manufacturing limits. No install, no account.
Drop your KiCad project folder or a .zip of it
Include the .kicad_pro, .kicad_pcb and .kicad_sch files. KiCad 5 to 10 projects work. 3D models and backups are left out automatically.
How do I check a KiCad design online?
Drop the project folder (or a zip of it) on the checker above, pick a fab profile, and wait a few seconds. The checker runs KiCad 10's DRC with your project's own rules after refilling zones, compares the PCB with the schematic, runs ERC on the schematic, and lists every finding with its location on the board and a link to what it means.
How to use the KiCad checker
- In KiCad, save the project. Then drop the whole project folder on the checker, or zip it first. The .kicad_pro, .kicad_pcb and .kicad_sch files are what matter; include the .kicad_dru file if you use custom rules.
- Choose whether to also check against JLCPCB or PCBWay standard capabilities.
- Read the summary. Errors come first, then warnings, grouped by check. Click a group to see each finding and circle it on the board picture, or follow What this means for the fix.
- Download the findings as a CSV if you want to work through them in KiCad or share them with a reviewer.
What the checker runs
- Board DRC: KiCad's Design Rules Checker with every severity, using the constraints, net classes and custom rules saved in your project. Copper zones are refilled first so stale fills do not cause false clearance errors.
- Unconnected items: every ratsnest connection still missing in copper.
- Schematic vs PCB: KiCad's schematic parity test, which catches footprints missing from the board, extra footprints and pad nets that no longer match the schematic. Runs when the schematic is in the upload.
- Schematic ERC: KiCad's Electrical Rules Checker on the whole hierarchy, with your pin conflict map.
- Fab rules: a separate DRC pass with only the chosen fab's published standard minimums, so you can see what would need an advanced (more expensive) process.
Fab profiles
Standard (no extra cost) minimums used by the fab check, read from each fab's capabilities page on 7 November 2026.
| Rule | JLCPCB 1–2 layer | JLCPCB 4+ layer | PCBWay |
|---|---|---|---|
| Trace width and spacing | 0.10 mm | 0.09 mm | 0.10 mm |
| Minimum drill | 0.15 mm | 0.15 mm | 0.15 mm (extra cost under 0.2 mm) |
| Non-plated hole | 0.50 mm | 0.50 mm | not checked |
| Via pad diameter | 0.25 mm | 0.25 mm | not checked |
| Annular ring (plated pads) | 0.18 mm | 0.15 mm | 0.15 mm |
| Hole to hole | 0.20 mm (0.45 mm pad to pad) | 0.20 mm (0.45 mm pad to pad) | not checked |
| Copper to board edge | 0.20 mm | 0.20 mm | not checked |
| Silkscreen text height / thickness | 1.0 / 0.15 mm | 1.0 / 0.15 mm | 0.8 / 0.15 mm |
“Not checked” means PCBWay's standard table does not publish that value. Fab limits change; check the fab's own page before ordering anything close to them.
Common KiCad errors, explained
Each finding in the checker links to its explanation. These are the checks people ask about most. The full list with every KiCad 10 check is on the KiCad error index.
DRC (PCB editor)
- Clearance violation
- Courtyards overlap
- Missing connection between items
- Items shorting two nets
- Thermal relief connection to zone incomplete
- Track has unconnected end
- Via is not connected or connected on only one layer
- Board edge clearance violation
- Hole clearance violation
- Drilled hole too close to other hole
- Annular width
- Hole size out of range
- Track width
- Via diameter
- Silkscreen clipped by solder mask
- Silkscreen clearance
- Text height out of range
- Solder mask aperture bridges items with different nets
- Board has malformed outline
- Isolated copper fill
- Footprint not found in libraries
ERC (schematic editor)
- Input Power pin not driven by any Output Power pins
- Input pin not driven by any Output pins
- Pin not connected
- Conflict problem between pins
- Label not connected
- Wires not connected to anything
- Symbol pin or wire end off connection grid
- More than one name given to this bus or net
- Labels are similar (lower/upper case difference only)
- Global label only appears once in the schematic
- Symbol is not annotated
- Library symbol issue
Privacy and limits
- We keep a private copy of each checked project and its results to improve ProtoFlow's tools and AI. It is never published or shared. Email admin@protoflow.ai with the upload ID shown after a check to have it deleted. See the privacy policy.
- 10 checks per network per day, free. Uploads up to 30 MB of KiCad files (3D models and backups are skipped).
- Each check runs on its own, with a time limit, on ProtoFlow's servers in the United States.
Related guides
- Every KiCad DRC and ERC error explained — what each message means and how to fix it.
- Online Gerber viewer — check the exported Gerbers before you order.
- Trace width calculator — size power traces before setting net class widths.
- ProtoFlow manufacturing outputs — Gerber X2, drills, BOM and placement files.
Frequently asked questions
Does it give the same results as KiCad?
It runs KiCad itself. The checker calls kicad-cli, KiCad's command-line tool, which uses the same Design Rules Checker and Electrical Rules Checker as the editor, with your project's own design rules, custom rules and severities. Zones are refilled before DRC, like the editor does by default.
Which KiCad versions can I upload?
The checker runs KiCad 10, which opens projects saved by KiCad 5 through 10. Results follow KiCad 10’s rules, so a board saved in an older version can show checks that version did not have.
Is my design stored or shared?
Stored, not shared. We keep a private copy of each project you check, together with its results, and may use it to improve ProtoFlow’s tools and AI models. It is never published, shown to other users or sold. Each check gets an upload ID; email admin@protoflow.ai with it to have that upload deleted. Don’t upload designs you are not allowed to share with us.
Why do I see so many library warnings?
KiCad compares placed footprints and symbols with your libraries. Those libraries usually live on your computer and are not in the upload, so KiCad reports them as missing. The checker lists these separately and leaves them out of the error and warning counts, because they say nothing about your copper or connections.
What does the JLCPCB or PCBWay check add?
A second DRC pass that uses only that fab's published standard minimums: trace width and spacing, drill size, annular ring, via pad, hole spacing, copper to edge and silkscreen text. Your own rules still run in the main pass. Values come from each fab's capabilities page and the date we read them is shown with the results.
Can I check Altium, EAGLE or EasyEDA designs?
Not here; the online checker reads KiCad projects. The ProtoFlow desktop app imports KiCad, Altium and EAGLE projects and runs DRC and ERC on them.
What does the checker not check?
Only what KiCad’s DRC and ERC and the fab rules check. It does not simulate the circuit, judge part choices, check signal integrity or review the layout like an engineer would. A clean result means the board passes those rules, not that the design works.
More free PCB tools
- AI circuit diagram makerDescribe a circuit in plain English and get a clean schematic with standard symbols and a checked netlist. Export SVG, PNG, PDF, KiCad or SPICE.
- PCB trace width calculatorIPC-2221 trace width for a given current and temperature rise, with resistance, voltage drop and power loss.
- PCB impedance calculatorSingle-ended and differential impedance for microstrip and stripline traces from your stackup.
- PCB via current calculatorHow much current a plated via carries, plus its resistance and voltage drop, from drill size and plating.
- Resistor color code calculatorRead 4, 5 and 6-band resistors, or find the bands for a value. SMD 3-digit, 4-digit and EIA-96 codes too.
- Voltage divider calculatorOutput voltage, or the resistor pair for a target voltage using real E24 and E96 values, with load effects.
- mm to mil converterConvert between millimetres, mils, inches and micrometres, with a PCB reference table for traces, drills and copper.
- Online Gerber viewerDrop a Gerber zip to see every layer and a rendered board, and check the files are ready to order. Files never leave your browser.
Sources
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ProtoFlow is free AI PCB design software: describe a circuit and get a schematic with real parts, PCB layout with an autorouter, SPICE simulation and Gerber files. Native KiCad, Altium and EAGLE import and export. Free on macOS, Windows and Linux.
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