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PROTOFLOW BENCHMARKS

Benchmark Library

Real boards and public benchmarks, routed by ProtoFlow Studio and checked in KiCad. Every attempt counts.

Measured: a run or an independent KiCad check Est.: a scenario estimate, not timed
Public benchmarkPublic scorer
PCBWorld-Bench board 0203 re-routed by ProtoFlow
PCBWorld-Bench board 0086 re-routed by ProtoFlow
PCBWorld-Bench board 0072 re-routed by ProtoFlow
PCBWorld-Bench board 0091 re-routed by ProtoFlow
Copper layers, KiCad export
Boards99 + 10Attempts1 / 3 eachScored byKiCad DRC

ProtoFlow on PCBWorld-Bench: 98 of 99 small boards KiCad-clean

0.990
D3-A score
1.000
D3-B score
0.919
Router, D3-A
32 s
D3-A median

LG AI Research's routing benchmark. ProtoFlow Studio with Claude Opus 5.5 comes back KiCad-clean on 98 of 99 small boards and 30 of 30 medium-board attempts, within each attempt's 30-minute limit, and 0.929 and 0.933 within three minutes.

Test sets
D3-A: 99 small boards · D3-B: 10 medium boards, 3 attempts each
Scoring
KiCad DRC Clean Pass, every attempt counted (D3-B averages three per board)
At 3 minutes
0.929 / 0.933
Router alone
0.919 / 0.900 with no AI model, about a second per board
Inspect the full test report
Analog acquisitionComplete
Rodeostat board routed by ProtoFlow Studio, 2D view
ProtoFlow 3.2.3 · Studio result
Connections372Nets90Layers2EDAKiCad 5

IO Rodeo Rodeostat: 2-layer potentiostat shield

100%
Routed
42m 47s
Studio time
~10 h
Est. by hand
~9 h
Est. saved

Kept the designer’s placement and rules and deleted all 1,627 tracks and 124 vias. ProtoFlow Studio (Claude Opus 5.5) then routed the board from one prompt, with one operator reminder to stay within ProtoFlow’s tools. KiCad 8: 372 of 372 connected, 0 DRC errors, no part moved, also after KiCad refills the pours. Studio once restored the prepared board by file copy before re-routing, and the screen recording has two gaps. Estimated routing effort: 10.3 h manual versus 1.6 h hands-on with ProtoFlow (assumed review and cleanup).

More of the engineering workflow

Reference designs with archived native checks. These estimates cover the stated design work; only Rodeostat has a measured routing recording.

Robot peripheral controller, archived routed top copper

Industrial 24 V I/O · reference design

Robot peripheral controller

203 components · 4 layers · 100 × 80 mm

Est. by hand
60 h
With ProtoFlow
3 h
Est. saved
~57 h

Saved native check: 0 DRC errors, 0 warnings, 0 unrouted. Four schematic sheets, 99 intended nets and 494 connected pins audited.

Actuator command board, archived routed top copper

STM32 + classical CAN · reference design

Actuator command board

78 footprints · 2 layers · 60 × 45 mm

Est. by hand
32 h
With ProtoFlow
2 h
Est. saved
~30 h

Saved native check: 0 DRC errors, 0 warnings, 0 unrouted. All 224 physical pins audited; 722 trace segments and 145 vias.

From circuit decisions to manufacturing files

Smaller examples, each with its own scope and estimated effort.

BLE condition-monitoring schematic

BLE condition-monitoring schematic

47 components · schematic only. Saved review: 0 ERC errors and 3 explained warnings, exact-pin connectivity and local footprint audits.

No PCB, firmware, battery-life or RF-performance result.

~15 h est. saved16 h by hand → 1 h with ProtoFlow
Five circuit-design tasks

Five circuit-design tasks

CAN · divider · NTC · LDO · reference. All five final schematics accepted on owner review; original ERC reports have 0 errors and 0 warnings.

Read the full write-up →
~12.7 h est. saved13 h by hand → 20 min with ProtoFlow

Hours by hand are planning estimates informed by published layout-effort data.

HOW WE TEST
01

Start from the designer’s board

A public, already-placed design. We keep its placement and rules and delete every track and via.

02

Route it in ProtoFlow Studio

One prompt to Studio, which routes with ProtoFlow’s own tools. Every attempt is recorded, including the ones that stall.

03

Check it outside ProtoFlow

KiCad counts connections and runs DRC under the original rules. A board is complete only at full connectivity, zero new errors and no part moved.

Design credits (each modified: tracks and vias removed, then re-routed by ProtoFlow; shown for illustration, not endorsed by the authors): Rodeostat potentiostat shield v0.2, IO Rodeo Inc., CC BY 4.0 (github.com/iorodeo/potentiostat). PCBWorld-Bench boards are credited on their report.

ProtoFlow

Bring us a board to route

We'll run it the same way, on your design and your rules, and show you the KiCad check.