KICAD REFERENCE
KiCad DRC and ERC errors, explained
Every check KiCad 10 can report, with the exact message you see in KiCad and the type name kicad-cli writes to its reports. The common ones link to what they mean and how to fix them.
Check a whole project at once
The free online checker runs KiCad's DRC and ERC on an uploaded project and links every finding back to this reference.
Open the KiCad checkerDRC errors (PCB editor)
- Missing connection between items — Why KiCad DRC lists unconnected items, including pads that only connect through a zone, and how to find and route the missing connections.
- Items shorting two nets — KiCad's shorting items error means copper from two different nets touches.
- Clearance violation — Why KiCad DRC reports a clearance violation between copper items, how KiCad picks the clearance it enforces, and how to fix or adjust it.
- Board edge clearance violation — What KiCad's board edge clearance check measures, the fab minimums for routed and V-cut edges, and how to fix copper near Edge.Cuts.
- Isolated copper fill — What KiCad's isolated copper warning means for zone fills and how the remove islands setting controls it.
- Thermal relief connection to zone incomplete — What KiCad's starved thermal check counts, why a pad gets too few thermal spokes, and the settings that fix it.
- Via is not connected or connected on only one layer — Why KiCad flags dangling vias, when a via connected on one layer is intentional (stitching, thermal), and how to clean up the rest.
- Track has unconnected end — Why KiCad warns about tracks with an unconnected end, whether a dangling stub matters, and how to remove them in bulk.
- Hole clearance violation — Why KiCad checks copper-to-hole clearance separately from copper clearance, and how to fix a hole clearance violation.
- Drilled hole too close to other hole — KiCad's hole-to-hole check prevents drill breakage.
- Track width — Why KiCad DRC reports a track width violation, where minimum track widths come from, and how to resize tracks across a board.
- Annular width — What the annular width error means in KiCad, why fabs need a minimum annular ring, and how to size pads and vias to pass.
- Hole size out of range — Why KiCad reports hole size out of range, how the minimum through-hole setting works, and the drill sizes common fabs accept.
- Via diameter — What triggers KiCad's via diameter error and how to resize vias across the whole board at once.
- Courtyards overlap — What the KiCad courtyards overlap error means, when two footprints really are too close, and how to exclude intentional overlaps.
- Board has malformed outline — What makes a KiCad board outline malformed (gaps, overlaps, self-intersection) and how to find and close the gap in Edge.Cuts.
- Footprint not found in libraries — Why KiCad DRC says a footprint was not found in the libraries, how library tables work, and when the warning is harmless.
- Solder mask aperture bridges items with different nets — Why KiCad flags solder mask openings that expose two nets, how mask web width works, and when bridged apertures are fine.
- Silkscreen clipped by solder mask — Why KiCad warns that silkscreen is clipped by solder mask openings, what the fab does with it, and how to tidy reference designators.
- Silkscreen clearance — What the KiCad silkscreen clearance warning checks and how to stop reference designators overlapping.
- Text height out of range — Minimum silkscreen text height in KiCad, what fabs can print, and how to resize all reference text at once.
All other KiCad DRC checks (43)
| Message in KiCad | kicad-cli type |
|---|---|
| Items not allowed | items_not_allowed |
| Text or graphic on Edge.Cuts layer | text_on_edge_cuts |
| Creepage violation | creepage |
| Tracks crossing | tracks_crossing |
| Copper zones intersect | zones_intersect |
| Drilled holes co-located | holes_co_located |
| Copper connection too narrow | connection_width |
| Track angle | track_angle |
| Track segment length | track_segment_length |
| Padstack is questionable | padstack |
| Padstack is not valid | padstack_invalid |
| Micro via hole size out of range | microvia_drill_out_of_range |
| Footprint has no courtyard defined | missing_courtyard |
| Footprint has malformed courtyard | malformed_courtyard |
| PTH inside courtyard | pth_inside_courtyard |
| NPTH inside courtyard | npth_inside_courtyard |
| Item on a disabled copper layer | item_on_disabled_layer |
| Duplicate footprints | duplicate_footprints |
| Missing footprint | missing_footprint |
| Extra footprint | extra_footprint |
| Pad net doesn't match schematic | net_conflict |
| Footprint attributes don't match symbol | footprint_symbol_mismatch |
| Footprint doesn't match symbol's footprint filters | footprint_filters_mismatch |
| Footprint field does not match symbol field | footprint_symbol_field_mismatch |
| Footprint doesn't match copy in library | lib_footprint_mismatch |
| Unresolved text variable | unresolved_variable |
| Copper sliver | copper_sliver |
| Silkscreen clipped by board edge | silk_edge_clearance |
| Text thickness out of range | text_thickness |
| Track length out of range | length_out_of_range |
| Skew between tracks out of range | skew_out_of_range |
| Too many or too few vias on a connection | too_many_vias |
| Differential pair gap out of range | diff_pair_gap_out_of_range |
| Differential uncoupled length too long | diff_pair_uncoupled_length_too_long |
| Footprint is not valid | footprint |
| Footprint component type doesn't match footprint pads | footprint_type_mismatch |
| Through hole pad has no hole | through_hole_pad_without_hole |
| Mirrored text on front layer | mirrored_text_on_front_layer |
| Non-Mirrored text on back layer | nonmirrored_text_on_back_layer |
| Missing tuning profile | missing_tuning_profile |
| Tuning profile track geometries | tuning_profile_track_geometries |
| Track connected to post-machined or backdrilled layer | track_on_post_machined_layer |
| Track endpoint not centered on via | track_not_centered_on_via |
ERC errors (schematic editor)
- Symbol pin or wire end off connection grid — Why off-grid pins and wire ends cause missed connections in KiCad schematics, and how to put symbols back on the connection grid.
- Pin not connected — Why KiCad flags unconnected pins, how to mark intentional no-connects, and how to spot near-misses.
- Input pin not driven by any Output pins — Why KiCad ERC says an input pin is not driven, how pin electrical types decide it, and how to fix connector and pull-up cases.
- Input Power pin not driven by any Output Power pins — The most common KiCad ERC error, explained: why power input pins need a driver, how PWR_FLAG works, and where to place it.
- Conflict problem between pins — How KiCad decides two pin types conflict (for example two outputs on one net), where the pin conflict map lives, and how to fix it.
- Label not connected — Why a KiCad net label shows as not connected, how the label anchor must touch the wire, and how to find dangling labels.
- Labels are similar (lower/upper case difference only) — Why "VCC" and "Vcc" are different nets in KiCad and how to fix labels that differ only in case.
- Global label only appears once in the schematic — Why a global label used only once connects to nothing, and how to fix it in a hierarchical KiCad schematic.
- More than one name given to this bus or net — What happens when a KiCad net has two labels, which name wins, and how to clean up conflicting net names.
- Wires not connected to anything — What KiCad's dangling wire warning means and how to clean up stray wires in a schematic.
- Library symbol issue — What KiCad's library symbol warning means, how symbol library tables work, and when it is harmless.
- Symbol is not annotated — Why KiCad needs reference designators before ERC, netlists and PCB updates, and how to annotate a schematic.
All other KiCad ERC checks (36)
| Message in KiCad | kicad-cli type |
|---|---|
| Duplicate sheet names within a given sheet | duplicate_sheet_names |
| Duplicate pins with different nets | duplicate_pins |
| Mismatch between hierarchical labels and sheet pins | hier_label_mismatch |
| Four connection points are joined together | four_way_junction |
| Label connects more than one wire | label_multiple_wires |
| A pin with a "no connection" flag is connected | no_connect_connected |
| Unconnected "no connection" flag | no_connect_dangling |
| Label connected to only one pin | isolated_pin_label |
| Power pins are similar (lower/upper case difference only) | similar_power |
| Power pin and label are similar (lower/upper case difference only) | similar_label_and_power |
| Local and global labels have same name | same_local_global_label |
| Local and global power symbols have same name | same_local_global_power |
| Different footprint assigned in another unit of the symbol | different_unit_footprint |
| Different net assigned to a shared pin in another unit of the symbol | different_unit_net |
| Conflict between bus alias definitions across schematic sheets | bus_definition_conflict |
| Net is graphically connected to a bus but not a bus member | net_not_bus_member |
| Buses are graphically connected but share no bus members | bus_to_bus_conflict |
| Invalid connection between bus and net items | bus_to_net_conflict |
| Ground pin not connected to ground net | ground_pin_not_ground |
| Pin name resembles stacked pin | stacked_pin_name |
| Field name has leading or trailing whitespace | field_name_whitespace |
| Unresolved text variable | unresolved_variable |
| Undefined netclass | undefined_netclass |
| SPICE model issue | simulation_model_issue |
| Symbol doesn't match copy in library | lib_symbol_mismatch |
| Footprint link issue | footprint_link_issues |
| Assigned footprint doesn't match footprint filters | footprint_filter |
| Symbol has more units than are defined | extra_units |
| Symbol has units that are not placed | missing_unit |
| Symbol has input pins that are not placed | missing_input_pin |
| Symbol has bidirectional pins that are not placed | missing_bidi_pin |
| Symbol has power input pins that are not placed | missing_power_pin |
| Units of same symbol have different values | unit_value_mismatch |
| Duplicate reference designators | duplicate_reference |
| Bus Entry needed | bus_entry_needed |
| Unconnected wire endpoint | unconnected_wire_endpoint |
Check list generated from KiCad 10's source (drc_item.cpp and erc_item.cpp). Last reviewed 2026-11-07.
