Design rule checks
A Design Rule Check (DRC) is the layout tool’s automated inspection. It verifies every trace width, every gap between copper features, and every drill size against a set of limits, and it confirms the copper matches the netlist with no missing or extra connections. It works like a spellchecker, except the typos cost you a manufacturing run.
The rule values come from your fab house. Every manufacturer publishes its capabilities: minimum trace width and spacing, smallest drill, mask tolerances. Load those numbers into your design rules before routing and the tool stops you the moment you draw something unbuildable, instead of after you’ve routed a whole board around it.
The electrical rule check (ERC) is the schematic-side companion. It catches unconnected pins, conflicting outputs, and unpowered chips. Run both early and often, and finish with zero unexplained violations. Any warning you deliberately waive should be one you can justify out loud, because “I’ll fix it later” violations have a way of shipping.
Key points
- DRC verifies the layout against manufacturing limits and against the schematic’s netlist.
- Rule values come from the fab’s published capabilities. Load them before routing, not after.
- ERC catches schematic-level mistakes: floating pins, output conflicts, missing power.
- Ship with zero unexplained violations, and be able to justify any warning you waive.
Practice
0 of 2 answered · Not startedWrong answers just let you try again, and hints are there if you want them. Answering every question first time, without hints, is what earns mastery.
- 1
What is the difference between DRC and ERC?
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Why should design rules be set from your fabricator's capabilities rather than left at the defaults?
