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CIRCUIT DIAGRAM EXAMPLE

Common Emitter Amplifier Circuit Diagram (NPN)

The common-emitter stage is the standard single-transistor voltage amplifier. Divider bias sets the operating point, the emitter resistor keeps that point stable from one transistor to the next, and a bypass capacitor restores the AC gain.

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NPN common-emitter amplifierNPN common-emitter amplifier2N3904 with divider bias and a bypassed emitter resistor++++12VVin+12VVoutR147 kΩR210 kΩC110 µFR34.7 kΩQ12N3904C210 µFR41 kΩC3100 µFBase voltageVB ≈ 12 V × 10 kΩ / (47 kΩ + 10 kΩ) ≈ 2.1 VEmitter currentIE ≈ (2.1 V − 0.7 V) / 1 kΩ ≈ 1.4 mACollector voltageVC ≈ 12 V − 1.4 mA × 4.7 kΩ ≈ 5.4 VVoltage gainAv ≈ −R3 / re = −4.7 kΩ / (26 mV / 1.4 mA) ≈ −250 unloadedMade with ProtoFlow · protoflow.ai
R1 and R2 hold the base near 2.1 V, which sets about 1.4 mA through R4 and the transistor. A small change at the base changes that current, and R3 turns it into a much larger, inverted voltage swing at the collector.

How this circuit works

R1 and R2 divide 12 V down to about 2.1 V at the base. The base-emitter junction drops about 0.7 V, which leaves 1.4 V across R4, so the emitter current is about 1.4 mA. The collector current is almost the same and drops about 6.6 V across R3, leaving the collector near 5.4 V, roughly mid-range, so the output can swing both ways.

This bias point barely depends on the transistor's current gain, which varies a lot between parts. If the current tries to rise, the emitter voltage rises with it, the base-emitter voltage shrinks and the current is pulled back. That negative feedback is R4's job.

For AC signals, C3 shorts R4, so the emitter sits at signal ground. A small change at the base then changes the collector current a lot: the gain is about −R3 / re, where re = 26 mV / IE ≈ 19 Ω, so roughly −250 before any load. The output is inverted: when the base goes up, the collector goes down.

C1 and C2 pass the signal but block DC, so the source and the load cannot upset the bias. Without C3 the gain drops to about −R3 / R4, roughly −4.7, but it becomes almost independent of the transistor and distorts far less. Many designs bypass only part of the emitter resistance to land in between.

Formulas

Base voltage
VB ≈ VCC × R2 / (R1 + R2) = 12 V × 10 kΩ / 57 kΩ ≈ 2.1 V
Emitter current
IE ≈ (VB − 0.7 V) / R4 = 1.4 V / 1 kΩ ≈ 1.4 mA
Collector voltage
VC ≈ VCC − IC × R3 = 12 V − 1.4 mA × 4.7 kΩ ≈ 5.4 V
Gain with C3
Av ≈ −R3 / re, re = 26 mV / IE ≈ 19 Ω, so Av ≈ −250

Unloaded. A load RL at the output replaces R3 with R3 ∥ RL in this formula.

Gain without C3
Av ≈ −R3 / (re + R4) ≈ −4.7 kΩ / 1.02 kΩ ≈ −4.6

Parts list

RefPartValueWhat it does
C1Electrolytic capacitor10 µFInput coupling capacitor, + toward the base.
C2Electrolytic capacitor10 µFOutput coupling capacitor, + toward the collector.
C3Electrolytic capacitor100 µFEmitter bypass capacitor. Raises the AC gain.
Q1NPN transistor2N39042N3904 small-signal NPN transistor.
R1Resistor47 kΩTop of the bias divider, 47 kΩ.
R2Resistor10 kΩBottom of the bias divider, 10 kΩ. With R1 it sets about 2.1 V at the base.
R3Resistor4.7 kΩCollector resistor. Sets the gain and the DC collector voltage.
R4Resistor1 kΩEmitter resistor. Stabilises the bias point.

Netlist

Recovered from the drawing itself: every pin on each net below is joined by a wire, a junction or a shared supply or ground symbol.

NetConnects
N1Q1.base, R1.1, R2.1, C1.+
N2Q1.collector, R3.1, C2.+
N3Q1.emitter, R4.1, C3.+
+12VR1.2, R3.2
GNDR2.2, R4.2, C3.-
VinC1.-
VoutC2.-

Common mistakes

  • Biasing the collector too close to a rail. With VC near 12 V, or near the emitter voltage, the output clips on one side.
  • Making the bias divider too weak. Its current should be about ten times the base current or more; here 0.21 mA against roughly 14 µA. With much larger resistors the base current pulls VB down and the bias depends on the transistor again.
  • Reversing the electrolytic coupling capacitors. Their + side must face the higher DC voltage: the base for C1 and the collector for C2.
  • Expecting −250 with a load attached. A 4.7 kΩ load halves the gain, and the spread of transistor parameters moves it further.

Build notes

  • The base current loads the divider a little, so the measured base voltage is closer to 2.0 V.
  • Without C3 the gain drops to about −R3 / R4 ≈ −4.7, but becomes far more predictable.

Frequently asked questions

Why is the output of a common-emitter amplifier inverted?

More base voltage means more collector current, which drops more voltage across the collector resistor and pulls the collector down. The output moves opposite to the input.

What does the emitter bypass capacitor do?

It shorts the emitter resistor for AC signals, raising the gain from about R3 / R4 to about R3 / re, while R4 still stabilises the DC bias.

How do I choose the bias resistors?

Pick the collector current, set the emitter voltage to roughly a tenth of the supply, add 0.7 V for the base, then choose a divider whose current is about ten times the base current.

What is the input impedance of this amplifier?

R1 ∥ R2 ∥ (β × re). With β = 100 that is 47 kΩ ∥ 10 kΩ ∥ 1.9 kΩ ≈ 1.5 kΩ with C3 in place.

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